Dr M Durga Prakash, Assistant Professor in the Department of Electronics and Communication Engineering, and his PhD scholar, Ms U Gowthami, have published a research paper titled “Performance Improvement of Spacer-engineered N-type Tree Shaped NSFET towards Advanced Technology nodes” in the Q1 journal, IEEE Access. The paper has an impact factor of 3.9 and will pave the way for significant advancements in the field.

Here’s an abstract of their research paper

Abstract:

Scaling gate lengths deep is most reliable with tree-shaped Nanosheet FETS (NSFET). This paper uses TCAD simulations to study the 12nm gate length (LG) n-type Tree-shaped NSFET with a stack of high-k dielectric (HfO2) and (SiO2) spacers. The Tree-shaped NFET device features high on-current (ION) and low off-current (IOFF) with T(NS) = 5 nm, W(NS) = 25 nm, WIB=5nm, and HIB = 25 nm. Comparison of single- and dual-k spacer 3D devices and DC properties are shown. Because fringing fields with spacer dielectric prolong the effective gate length, the dual-k device has the highest ION / IOFF ratio, 109, compared to 107. This research also examines where work function, inter bridge height, breadth, gate lengths, temperature, and analog/RF and DC metrics affect the device. The suggested device has good electrical properties at 12 nm LG, with DIBL = 23 mV/V, SS = 62 mV/dec, and switching ratio (ION / IOFF) = 109. The device’s performance proves Moore’s law applies to lower technological nodes, enabling scalability.

The link to the article- https://ieeexplore.ieee.org/document/10499264 DOI: 10.1109/ACCESS.2024.3388504

In the groundbreaking research paper titled “Innovative Web Application Revolutionizing Disease Detection: Empowering Users and Ensuring Accurate Diagnoses,” Dr Pradyut Sanki, Associate Professor at the Department of Electronics and Communication Engineering, along with doctoral scholars Mr P N S B S V Prasad, and Mr Syed Ali Hussain and BTech students Ms Pragya Gupta and Ms Swikriti Khadke introduce a cutting-edge web application that aims to revolutionise disease detection and empower users to understand their health conditions.Their research paper published in the Journal of Electronic Materials has an impact factor of 2.1.

Abstract:

This paper presents an innovative enhancement aimed at revolutionizing disease detection and providing users with a reliable source of information for accurate diagnoses of their symptoms. Our open-source initiative combines a user-friendly interface design with advanced machine learning models, establishing a new benchmark for accuracy and enabling integration with even higher-performing models. We address the pervasive challenges of misinformation and misdiagnosis associated with online symptom searches, presenting a significant advancement in disease detection. Leveraging cutting-edge machine learning techniques.

Practical and Social Implications:

The practical implementation of our research means that people can use our smart tool to get better advice about their symptoms. This could lead to quicker and more accurate diagnoses, helping people get the right treatment sooner. Socially, our research could reduce the spread of false information online about health issues, leading to better-informed decisions and potentially improving overall public health.

Future Research Plans:

As a future research plan the students and faculty together plan to refine and expand their smart tool to make it even more accurate and helpful. They aim to incorporate feedback from users and collaborate with other experts to continually improve the technology. Additionally, they plan to explore ways to make the tool more accessible to a wider range of people and to address any potential biases in the data or algorithms. Overall, they are committed to advancing healthcare technology for the benefit of society.

It is a matter of immense pleasure for the Department of Electronics and Communication Engineering to announce the publication of Dr Duga Prakash, Associate Professor at SRM University-AP. His research paper titled “Analysis of GAA Junctionless NS FET towards Analog and RF Applications at 30 nm Regime”, published in IEEE Open Journal of Nanotechnology, studies how the device can be manufactured with ease and minimal doping, eliminating the need for high-temperature doping processes. The enhanced performance metrics suggest that the device’s potential for faster analog/RF switching circuits paves the way for more efficient analog and RF applications at the 30 nm scale.

Abstract:

A new nanosheet FET is used to generate a quantum model in this research. A Gate-all-around (GAA) Junction-less (JL) nanosheet device with a 1 nm gate dielectric of SiO2 and HfO2 performs according to the standard model. The visual TCAD tool examines ION, IOFF, ION/ IOFF, threshold voltage, DIBL, gain parameters (gm, gd, Av), gate capacitance, and cut-off frequency to evaluate the classical and quantum models of the GAA nanosheet device. Simulation results show that the device’s low gate capacitance of 10–18 makes it suitable for rapid switching applications. Device research reveals a transconductance (gm) value of 21 μS and a remarkable cut-off frequency of 9.03 GHz. Its P-type device response has also been extensively studied. Finally, the inverter model uses the proposed GAA nanosheet device. Despite having larger gate capacitance, the NSFET-based inverter offers the smallest propagation delay helps apply knowledge to real-world situations.