Assistant Professor

Dr Saswat Kumar Ram

Department of Electronics and Communication Engineering

Interests

  1. VLSI Design & Embedded Systems
  2. Hardware Security
  3. Internet of Things (IoT)

Education

2005

Biju Patnaik University of Technology, Odisha
India
BE

2011

National Institute of Technology (NIT), Rourkela
India
MTech

2022

National Institute of Technology (NIT), Rourkela
India
PhD

Experience

  • 2022-2023 - Assistant Professor (Senior Grade)- Amrita Vishwa Vidyapeetham, Coimbatore Campus, Amritanagar, Coimbatore, Tamil Nadu
  • 2012-2016 - Assistant Professor - C.V. Raman Global University (CVRGU), Bhubaneswar, Odisha, India
  • 2011-2012 - Assistant Professor - Hi-Tech Institute of Technology (HIT), Bhubaneswar, Odisha, India
  • 2006-2009 - Senior Lecturer - Purushottam Institute of Engineering Technology (PIET), Rourkela, Odisha, India

Research Interest

  • VLSI Design & Embedded Systems:
  • Analog and Digital VLSI Design
  • Analog and Mixed Mode VLSI Design
  • Hardware Security
  • Fabrication of Chip (IC)

Awards & Fellowships

  • 2021 - Runner-up Best Paper Award from IEEE Transactions on Sustainable Computing by the IEEE Computer Society Publications Board for paper, "Eternal-Thing: A Secure Aging-Aware Solar-Energy Harvester Thing for Sustainable IoT"
  • 2019 - Best Research Paper Award in IEEE iSES
  • 2014 - Awarded for good Academic Performance by CV Raman College of Engineering, Bhubaneswar on Jan 18, 2016.
  • 2013 - Awarded for good Academic Performance by CV Raman College of Engineering, Bhubaneswar on Nov 15, 2014.

Memberships

  • Member IEEE (Membership ID-93028918)
  • Member ACM (Membership ID-2773875)

Publications

Journals:

  • Bala Vishnu J, S. K. Ram and Deepan N, “Energy-Efficient Adaptive Sensing for Cognitive Radio Sensor Network in the Presence of Primary User Emulation Attack”. Elsevier Journal of Computer and Electrical Engineering, Vol. 106, pp. 108619, March 2023, (Q1, IF-4.152).
    https://doi.org/10.1016/j.compeleceng.2023.108619
  • S. K. Ram, S. R. Sahoo, B. B. Das, K. K. Mahapatra and S. P. Mohanty, “Eternal-Thing 2.0: Analog- Trojan Resilient Ripple-Less Solar Energy Harvesting System for Sustainable IoT in Smart Cities and Smart Villages.” ACM Journal on Emerging Technologies in Computing Systems (JETC), Nov 2022, (Q2, Accepted, IF-2).
    https://doi.org/10.1145/3575800
  • S. K. Ram, S. R. Sahoo, B. B. Das, K. Mahapatra and S. P. Mohanty, "Eternal-Thing: A Secure Aging-Aware Solar-Energy Harvester Thing for Sustainable IoT," in IEEE Transactions on Sustainable Computing, vol. 6, no. 2, pp. 320-333, April-June 2021, (Q1, IF-4.908).
    https://doi.org/10.1109/TSUSC.2020.2987616
  • S. K. Ram, B. B. Das, K. Mahapatra, S. P. Mohanty and U. Choppali, "Energy Perspectives in IoT Driven Smart Villages and Smart Cities" in IEEE Consumer Electronics Magazine, vol. 10, no. 3, pp.19-28, May 2021, (Q1, IF-4.135).
    https://doi.org/10.1109/MCE.2020.3023293
  • B.B. Das, P. Kumar, D. Kar, S.K. Ram., R.K. Mahapatra, and K.S. Babu, et al. A spatio-temporal model for EEG-based person identification. Multimedia Tools and Applications, Vol. 78, pp.28157–28177 (2019), (Q1, IF-2.577)
    https://doi.org/10.1007/s11042-019-07905-6

Book Chapters

  • S. K. Ram, B. B. Das, B. Pati, C. R. Panigrahi, and K. K. Mahapatra, “SEHS: Solar Energy Harvesting System for IoT Edge Node Devices”, in Springer Advances in Intelligent Systems and Computing book series, ISSN: 2194-5357.
  • B. B. Das, S. K. Ram, B. Pati, C. R. Panigrahi, K. S. Babu, and R. K.. Mohapatra, “SVM and Ensemble-SVM in EEG-based Person Identification”, in Springer Advances in Intelligent Systems and Computing book series, ISSN: 2194-5357.

Conferences

  • S. K. Ram, B. B. Das, B. Pati, C. R. Panigrahi, and K. K. Mahapatra. "SEHS: Solar Energy Harvesting System for IoT Edge Node Devices." In Progress in Advanced Computing and Intelligent Engineering, pp. 432-443. Springer, Singapore, 2021.
  • H. M. Mohan, S. K. Dash, S. K. Ram and W. Caesarendra, "Performance assessment of three-phase PV tied NPC multilevel inverter based UPQC," IEEE International Conference on Intelligent Controller and Computing for Smart Power (ICICCSP), 2022, pp. 1-5, doi: 10.1109/ICICCSP53532.2022.9862340.
  • B. B. Das, S. K. Ram, B. Pati, C. R. Panigrahi, K. S. Babu, and R. K. Mohapatra. "SVM and Ensemble-SVM in EEG-based Person Identification." In Progress in Advanced Computing and
    Intelligent Engineering
    , pp. 137-146. Springer, Singapore, 2021.
  • S. K. Ram, S. Chourasia, B. B. Das, A.K. Swain, K. Mahapatra, and S. P. Mohanty. "A Solar Based Power Module for Battery-Less IoT Sensors Towards Sustainable Smart Cities." In 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 458-463., 2020.
  • S. K. Ram, B. B. Das, A. K. Swain, and K.K. Mahapatra, “Ultra-Low Power Solar Energy Harvester for IoT Edge Node Devices," IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS), Rourkela, India, Dec. 2019. (Best Research Paper Award)
  • S. K. Ram, S. R. Sahoo, Sudeendra. K., and K.K. Mahapatra, " Energy Efficient Ultra Low Power Solar Harvesting System Design with MPPT for IOT Edge Node Devices," IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS), Hyderabad, India, pp. 130-133, Dec. 2018.
  • S. K. Ram, B. B. Das, “Digital Controller Design for Three Phase Active Power Filter for Harmonic and Reactive Power Compensation Using FPGA and System Generator”, IEEE ICICT, pp. 1-6, vol. 3, Aug. 2016.
  • S. K. Ram,B. B. Das, “A New Approach to Design Digital Controller for Three Phase Active Power Line Conditioner for Harmonic Compensation Using 8051 Microcontroller”, IEEE ICICT, pp. 1-5, vol. 3, Aug. 2016.
  • B. B. Das, S. K. Ram, “Localization Using Beacon in Wireless Sensor Networks to detect Faulty nodes and Accuracy Improvement through DV-Hop Algorithm”, IEEE ICICT, pp. 1-5, vol. 1, Aug. 2016.
  • S. K. Ram and B. B. Das, “Comparison of different control strategy of Conventional and Digital Controller for Active Power Line Conditioner (APLC) For Harmonic Compensation”, IEEE EEEIC, pp. 209-214, 2013.
  • S. R. Prusty, S. K. Ram, K. K. Mahapatra and B. D. Subudhi, “Performance Analysis of Adaptive Band Hysteresis Current Controller for Shunt Active Power Filter” IEEE ICETECT, pp.425-429, Mar. 2011.
  • Kauppanan P, S. K. Ram, K.K. Mahapatra, “Three Level Hysteresis Current Controller Based Active Power Filter for Harmonic Compensation” IEEE ICETECT, pp.407-412, Mar. 2011.
  • S. K. Ram, S. R. Prusty, P. K. Barik, K. K. Mahapatra, and B. D. Subudhi, “FPGA Implementation of Digital Controller for Active Power Line Conditioner using SRF Theory” IEEE EEEIC, pp. 1-5, May 2011.

Patents

  • S. K. Ram, B. B. Das, A. K. Swain, and K.K. Mahapatra, “AN ENERGY HARVESTING SYSTEM FOR NODE DEVICES AND A METHOD THEREOF”. (Published-Indian Patent, Patent application no.- 202241066526, December 23, 2022)

Chip Tape out: 02

  • ASIC chip-1 for Solar PV harvesting system (EDU0060)
    Chip details:
    48-Pin chip, Homogenous I/O design. All I/O’s are designed for 3.3 V.
    Physical Unclonable Function (PUF) is included in the chip along with Solar PV harvesting design.
    Core Dimension: - (1318 X 1380) (L X B), Chip Dimension: - ( 2 mm X 2 mm).
    I/O used for Solar PV design: - 37 pins, I/O used for PUF Design: - 11 pins
  • ASIC chip-2 for Mixed-Mode Solar PV Harvesting System with Power Management
    Chip details:
    64-Pin chip, Homogenous I/O design. I/O’s are designed for 1.8 V and 3.3 V.
    Physical Unclonable Function (PUF) is included in the chip along with Solar PV harvesting design.
    Core Dimension: - (1000 X 1100) (L X B), Chip Dimension: - ( 2 mm X 2 mm).
    I/O used for Mixed Solar PV design and Power Management: - 25 pins.
    I/O used for other Design: - 39 pins

Contact Details

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