Assistant Professor

Dr Leenendra Chowdary Gunnam

Department of Electronics and Communication Engineering

Interests

  • Analog to Digital Converters
  • Read-out circuits for sensors
  • FPGA Based system Design

Education

2006

Pondicherry Central University, Pondicherry,
India
BTech

2010

JNT University, Kakinada, Andhra Pradesh,
India
MTech

2019

National Taipei University of Technology, Taipei,
Taiwan
PhD

Experience

  • Mar 2023 – Jan 2024 - Associate Professor, Sasi Institute of Technology & Engineering, Tadepalligudem, India.
  • Oct 2022 – Jan 2023 - Post-doctoral Research Associate, Department of Electrical Engineering Baylor University, Waco, Texas, USA
  • Aug 2019 – Sep 2022 - Associate Professor, Sasi Institute of Technology & Engineering, Tadepalligudem, India
  • Sep 2016 – July 2019 - Research assistant, Analog and Digital IC Design Laboratory, National Taipei University of Technology, Taipei, Taiwan
  • Mar 2016 – July 2016- Research assistant, Intelligent Robot Laboratory, Busan University of Foreign Studies, Busan, Republic of Korea
  • Dec 2010 – Mar 2016- Assistant Professor, Sasi Institute of Technology & Engineering, Tadepalligudem, India

Research Interest

  • Switched Current Circuits.
  • Delta Sigma Analog to Digital Converters.
  • Sensors and Signal Conditioning circuits.
  • FPGA Based system Design.
  • IOT for Agriculture and Health care systems

Awards & Fellowships

  • 2018 - Foreign Student Scholarship - National Taipei University of Technology, Taiwan
  • 2017 - Foreign Student Scholarship - National Taipei University of Technology, Taiwan

Memberships

  • 2023- Senior Member-IEEE
  • 2024- Member-IEEE Solid-State Circuits Society
  • 2024- Member-IEEE Electronics Packaging Society
  • 2024- Member- IEEE Relaiblity Society
  • 2024- Member-IEEE Vehicular Technology Society
  • 2013- Member-The Indian Society for Technical Education (ISTE)

Publications

SCI Journals:

  • G. -M. Sung, C. -T. Lee, X. Xiao and L. -C. Gunnam, "4th-Order Switched-Current Multistage-Noise-Shaping Delta-Sigma Modulator with a Simplified Digital Noise Cancellation Circuit," in IEEE Access, vol. 8, pp. 168589-168600, 2020, doi: 10.1109/ACCESS.2020.3023416.
  • L. C. Gunnam, G. Sung, L. Weng and T. Fan, "2-1 Switched-current multi-stage noise shaping delta–sigma modulator with a digital noise-cancellation circuit," in IET Circuits, Devices & Systems, vol. 13, no. 3, pp. 327-336, 5 2019, doi: 10.1049/iet-cds.2018.5025.
  • Guo-Ming Sung, Hsin-Kwang Wang, and L. C. Gunnam, “A One-Dimensional Magnetic Chip with a Hybrid Magneto sensor and a Readout Circuit,” Journal of Sensors, vol. 2018, Article ID 6436481, 10 pages, 2018. doi:10.1155/2018/6436481.
  • G. M. Sung, L. C. Gunnam, H. K. Wang and W. S. Lin, "Three-Dimensional CMOS Differential Folded Hall Sensor with Bandgap Reference and Readout Circuit," in IEEE Sensors Journal, vol.18, no. 2, pp. 517-527, Jan.15, 2018. doi:10.1109/JSEN.2017.2777485
  • Guo-Ming SUNG, L. C. Gunnam, Wen-Sheng LIN, Ying-Tzu LAI, “A Third-Order Multibit Switched-Current Delta-Sigma Modulator with Switched-Capacitor Flash ADC and IDWA”, IEICE Transactions on Electronics, Released August 01, 2017, Online ISSN 1745 1353, Print ISSN 0916-8524, https://doi.org/10.1587/transele.E100.C.684.


Scopus and Conferences Publications:

  • Sung GM., Gunnam L.C., Sung SH. (2019) Switched-Current Sampled and Hold Circuit with Digital Noise Cancellation Circuit for 2+2 MASH ƩΔ Modulator. In: Arai K., Bhatia R., Kapoor S. (eds) Intelligent Computing. Comp Com 2019. Advances in Intelligent Systems and Computing, vol 998. Springer, Cham.
  • L. C. Gunnam, Y. J. Lai and G. M. Sung, "Differential Dickson voltage multiplier with matching network for radio frequency harvester," 2017 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW), Taipei,2017, pp.417-418.doi: 10.1109/ICCE China.2017.7991173.
  • L. C. Gunnam, G. M. Sung and L. W. Weng, "2+1- order Switched-current MASH Delta Sigma ADC with the digital cancellation circuit," 2017 International Conference on Applied System Innovation (ICASI), Sapporo, 2017, pp.1801-1804.doi: 10.1109/ICASI.2017.7988293.
  • K. C. Nunna, F. Mehdipour, M. Said, L. C. Gunnam and K. Murakami, "Significance of early thermal management for 3D FPGAs at partitioning stage," 2016 International Conference on Microelectronics, Computing and (Micro Com), Durgapur,2016, pp.1-5.doi: 10.1109/MicroCom.2016.7522509. Communications
  • Narendra Babu T, Fazal Noor basha, L. C. Gunnam, “Implementation of High Security Cryptographic System with Improved Error Correction and Detection Rate using FPGA”, International Journal of Electrical and Computer Engineering (IJECE) Vol. 6, No. 2, April 2016, pp. 602-610.

Contact Details

  • E-mail id: leenendra.c@srmap.edu.in
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