It is a matter of immense pleasure for the Department of Electronics and Communication Engineering to announce the publication of Dr Duga Prakash, Associate Professor at SRM University-AP. His research paper titled “Analysis of GAA Junctionless NS FET towards Analog and RF Applications at 30 nm Regime”, published in IEEE Open Journal of Nanotechnology, studies how the device can be manufactured with ease and minimal doping, eliminating the need for high-temperature doping processes. The enhanced performance metrics suggest that the device’s potential for faster analog/RF switching circuits paves the way for more efficient analog and RF applications at the 30 nm scale.
Abstract:
A new nanosheet FET is used to generate a quantum model in this research. A Gate-all-around (GAA) Junction-less (JL) nanosheet device with a 1 nm gate dielectric of SiO2 and HfO2 performs according to the standard model. The visual TCAD tool examines ION, IOFF, ION/ IOFF, threshold voltage, DIBL, gain parameters (gm, gd, Av), gate capacitance, and cut-off frequency to evaluate the classical and quantum models of the GAA nanosheet device. Simulation results show that the device’s low gate capacitance of 10–18 makes it suitable for rapid switching applications. Device research reveals a transconductance (gm) value of 21 μS and a remarkable cut-off frequency of 9.03 GHz. Its P-type device response has also been extensively studied. Finally, the inverter model uses the proposed GAA nanosheet device. Despite having larger gate capacitance, the NSFET-based inverter offers the smallest propagation delay helps apply knowledge to real-world situations.
